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Thursday, October 24 • 3:00pm - 3:50pm
From Weak to Weedy: Effective Use of Memory Barriers in the ARM Linux Kernel - Will Deacon, ARM, Ltd.

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The ARMv7/v8 architectures feature weakly-ordered memory models, allowing hardware designers to implement a variety of optimisations in the memory subsystem. Whilst this can improve the performance and power consumption of embedded ARM CPUs, it can also lead to subtle software bugs which are incredibly hard to debug. As a result, software engineers tend to use either too many barrier instructions or heavyweight variants to err on the side of caution. Both of these practices have performance costs, which will increase as the number of cores on a typical SoC continues to rise. This presentation describes the various barrier instructions in the ARM architecture and how to use them in the Linux kernel. It will also introduce changes proposed to the ARM kernel port allowing users of barriers to control their propagation within the system and measurably improve performance.

avatar for Will Deacon

Will Deacon

Staff Software Engineer, ARM
Will Deacon is a kernel hacker at ARM Ltd, where he works primarily on the architecture side of things for both the arm and arm64 ports of Linux. He generally works on adding support for new architectural features to Linux, but also enjoys improving and optimising the code that is already there, particularly in the areas of low-level synchronisation and memory manangement. Inside the kernel, Will maintains the recently merged ARM SMMU driver as... Read More →

Thursday October 24, 2013 3:00pm - 3:50pm
Carrick Suite

Attendees (23)