Embedded Linux Conference Europe

The ARMv7/v8 architectures feature weakly-ordered memory models, allowing hardware designers to implement a variety of optimisations in the memory subsystem. Whilst this can improve the performance and power consumption of embedded ARM CPUs, it can also lead to subtle software bugs which are incredibly hard to debug. As a result, software engineers tend to use either too many barrier instructions or heavyweight variants to err on the side of caution. Both of these practices have performance costs, which will increase as the number of cores on a typical SoC continues to rise. This presentation describes the various barrier instructions in the ARM architecture and how to use them in the Linux kernel. It will also introduce changes proposed to the ARM kernel port allowing users of barriers to control their propagation within the system and measurably improve performance.