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Thursday, October 24 • 3:00pm - 3:50pm
From Weak to Weedy: Effective Use of Memory Barriers in the ARM Linux Kernel - Will Deacon, ARM, Ltd.

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The ARMv7/v8 architectures feature weakly-ordered memory models, allowing hardware designers to implement a variety of optimisations in the memory subsystem. Whilst this can improve the performance and power consumption of embedded ARM CPUs, it can also lead to subtle software bugs which are incredibly hard to debug. As a result, software engineers tend to use either too many barrier instructions or heavyweight variants to err on the side of caution. Both of these practices have performance costs, which will increase as the number of cores on a typical SoC continues to rise. This presentation describes the various barrier instructions in the ARM architecture and how to use them in the Linux kernel. It will also introduce changes proposed to the ARM kernel port allowing users of barriers to control their propagation within the system and measurably improve performance.

avatar for Will Deacon

Will Deacon

Linux Kernel Hacker, Arm
Will is a Linux kernel hacker at Arm Ltd. with an unhealthy interest in concurrency and computer architecture. He is an active upstream contributor and co-maintains various parts of the kernel including the arm64 architecture port and the memory consistency model.

Thursday October 24, 2013 3:00pm - 3:50pm BST
Carrick Suite

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